The Notification Oriented Paradigm Language to Digital Hardware as an Intuitive High-level Synthesis Tool

The parallelism allowed by FPGAs has attracted attention for knowing applications that need processing power. However, the specific and very technical development language not stimulate its broad use. As an alternative, there are High-level Synthesis Languages (HSL), which allow less complicated FPGA they do tend to take full advantage of technology. Therefore, another alternative was developed, based on Notification Oriented Paradigm (NOP), called NOP Digital Hardware (NOP-DH). allows in high level with rule-oriented NOPL. Its entity decoupling, parallelism, redundancy avoidance useful best performance. In turn, NOP-DH brings context benefits observed software but enhanced hardware nature. This paper reviews NOPL (NOPL-DH) aims programming FPGA. proposes NOPL-DH test independent developers, developing a monitoring device box transporting bidirectional conveyer. result, high-level under structure FPGA, without knowledge and, still, maintaining exploring properties